Cadence OrCAD FPGA System Planner

The Cadence® OrCAD® FPGA System Planner provides a complete, scalable solution for FPGA-PCB co-design that allows users to create an optimum correct-by-construction pin assignment. FPGA pin assignment is synthesized automatically based on user-specified, interface-based connectivity (design intent), as well as FPGA pin assignment rules (FPGA-rules), and actual placement of FPGAs on PCB (relative placement)

Integrating today’s large-pin-count FPGAs – with their many different types of user-configurable pins and assignment rules – extends the time to create optimal pin assignment. Often the assignment is done manually at a pin-by-pin level in an environment that is unaware of the placement of critical PCB components that are connected to FPGAs. Without understanding the impact to PCB routing, FPGA-based design projects are forced to choose between two poor options: live with suboptimal pin assignment, which can increase the number of layers on a PCB design; or deal with several unnecessary iterations at the tail end of the design cycle. Even with several iterations, this manual and error-prone approach can result in unnecessary PCB design re-spins.

The OrCAD FPGA System Planner is integrated with both OrCAD Capture and OrCAD PCB Editor. It reads and creates OrCAD Capture schematics and symbols. In addition, a floorplan view uses existing footprint libraries from OrCAD PCB Editor. Should placement change during layout, pin optimization using FPGA System Planner can be accessed directly from OrCAD PCB Editor.

Features/Benefits

• Scalable, cost-effective FPGA-PCB co-design solution from OrCAD to Cadence Allegro® GXL
• Shortens time for optimum initial pin assignment, accelerating PCB design schedules
• Accelerates integration of FPGAs with OrCAD PCB design creation environments
• Eliminates unnecessary, frustrating design iterations during the PCB layout process
• Eliminates unnecessary physical prototype iterations due to FPGA pin assignment errors
• Reduces PCB layer count through placement aware pin assignment and optimization

Cadence OrCAD Capture and Capture CIS

An industry standard in schematic design entry

OrCAD Capture provides fast and intuitive schematic design entry for PCB development or analog simulation using PSpice. The component information system (CIS) integrates with it to automatically synchronize and validate externally sourced part data.

Easy-to-use and powerful, Cadence® OrCAD® Capture is the most widely used schematic design solution, supporting both flat and hierarchal designs from the simplest to the most complex. Seamless bi-directional integration with OrCAD PCB Editor enables data synchronization and cross-probing/placing between the schematic and the board design. OrCAD Capture allows designers to backannotate layout changes, make gate/pin swaps, and change component names or values from board design to schematic using the feedback process. It also comes with a large library of schematic symbols and can export netlists in a wide variety of formats.

OrCAD Capture CIS integrates the OrCAD Capture schematic design application with the added capabilities of a component information system (CIS) and the Cadence ActiveParts Portal.

CIS allows designers to search, identify, and populate the design with preferred parts. With easy access to company component databases and part information, designers can reduce the amount of time spent researching needed parts.

The ActiveParts Portal is an expansion of the existing Cadence ActiveParts online component data solution for access to component information. As part of the new ActiveParts Portal, Cadence is teaming with SupplyFrame, Inc. as the first portal member. In this initial integration, select parts within the SupplyFrame database have schematic symbols mapped to them for placement into a schematic design.

Features/Benefits

• Boosts schematic editing efficiency of complex designs through hierarchical and variant design capabilities
• Integrates with a robust CIS that promotes the use of preferred, current parts to accelerate the design process and reduce project costs
• Provides access to more than two million parts with Cadence ActiveParts, offering greater flexibility when choosing design components

Cadence OrCAD PCB Designer

Proven, easy-to-use PCB place-and-route technology

Based on production-proven Allegro PCB technology, from the Allegro platform, OrCAD PCB Editor offers a wide array of powerful features to speed designs from placement and routing through to manufacturing.

Cadence® OrCAD® PCB Designer contains a fully integrated design flow that includes a constraint manager, design capture technology, component tools, a PCB editor, an auto/interactive router, and interfaces for manufacturing and mechanical CAD.

At the heart of OrCAD PCB Designer is OrCAD PCB Editor, an interactive environment for creating and editing simple to complex multi-layer PCBs. The extensive feature set addresses a wide range of design and manufacturability challenges. OrCAD PCB Designer and OrCAD PCB Designer with PSpice both include Cadence SPECCTRA® for OrCAD, the market-leading PCB solution for automatic and interactive interconnect routing. Designed to handle routing challenges requiring complex design rules, it uses powerful shape-based algorithms for speed and efficient use of the routing area. Optional PSpice® circuit analysis and simulation capabilities integrated with the included OrCAD Capture facilitates rapid design-and-simulate cycles, allowing engineers to explore various design configurations before committing to a specific circuit implementation.

A common database architecture, use model, and library offer truly scalable PCB solutions for both OrCAD and Allegro products, allowing engineers the ability to migrate to the Allegro PCB technologies as their designs and design challenges increase in complexity.

Features/Benefits

• Offers a proven, scalable, easy-to-use PCB editing and routing solution that grows as needed
• Tight, front-to-back application integration increases productivity and ensures data integrity
• A comprehensive feature set and a seamless PCB design environment delivers a complete solution to take a design from concept to production

Cadence ActiveParts Portal

Component Search… Save… Place

Cadence® ActiveParts Portal automates the process of part selection and extends the reach of engineers using Cadence OrCAD® Capture CIS. ActiveParts Portal is FREE for users on the most current release of OrCAD Capture CIS on an active maintenance contract. It is a built into OrCAD Capture CIS and does not require additional software installation.

Engineers spend considerable time searching books and catalogs for the right parts to use in their schematics. Even after finding a part, they spend more time creating a symbol and adding the component information to place it into the schematic. With the ActiveParts Portal, searching is simple and placing a symbol into the schematic is as easy as a mouse click.

Users can search for parts based on a variety of attributes such as electrical description, manufacturer, technology, and part number - to name a few. In addition, they can add a local parts database. This allows users to easily develop an OrCAD Capture CIS database and library set.

Features/Benefits

• Expedites the component research process by automating searches and allowing components to saved and placed directly onto a schematic page
• Facilitates library development through the ability to download any symbol to a local library
• Reduces time spent searching for the right component with intelligent search options

Cadence OrCAD Signal Explorer

Pre and post-route signal integrity analysis and board-level topology exploration

Cadence® OrCAD® Signal Explorer enables signal exploration, analysis, and validation that helps engineers address signal integrity issues throughout the design process-from the beginning of the design cycle through placement and final routing. In the pre-routing stages, OrCAD Signal Explorer allows engineers to prototype and access topology interconnect alternatives quickly to improve circuit reliability and performance. In the final stages, it provides design verification directly from the PCB Editor database. Seamless integration with Cadence OrCAD PCB Editor eliminates database conversion and possible translation issues.

Key benefits

• Enables pre and post-route SI analysis at any stage of the design cycle
• Provides ability to explore, analyze, and design interconnect topology to help increase circuit reliability, improve circuit performance, and help reduce prototype re-spins
• Eliminates need to translate design databases to run simulations by importing topology extraction directly from the PCB Editor
• Includes an easy-to-use editing environment to create, manipulate, and validate a variety of models quickly

The OrCAD product line is supported by a worldwide network of Cadence® Channel Partners. For sales, technical support, and training inquiries, please visit the global Cadence Channel Partner listing to find a partner in your region.

Cadence PSpice A/D and Advanced Analysis

Cadence® Pspice® is a full-featured, native analog and mixed-signal circuit simulator. Used in conjuction with PSpice A/D, PSpice Advanced Analysis tools help designers improve yield, and reliability of their designs.

Cadence® PSpice® A/D is the de-facto industry-standard Spice-based simulator for system design. It simulates complex mixed-signal designs containing both analog and digital parts, and it supports a wide range of simulation models such as IGBTs, pulse width modulators, DACs, and ADCs. Its built-in mathematical functions and behavioral modeling techniques enable fast and accurate simulation of designs with efficient debugging. PSpice A/D also allows users to design and generate simulation models for transformers and DC inductors.

Scalability options include PSpice Advanced Analysis capabilities and integration with MathWorks MATLAB Simulink for co-simulation. Advanced capabilities such as temperature and stress analysis, electro-mechanical simulation, worst-case analysis, Monte Carlo analysis, and curve-fit optimizers help engineers design high-performance circuits that are reliable and withstand parameter variation.

Full integration with Allegro® Design Entry HDL and OrCAD® Capture gives customers a choice among schematic tools to capture their designs.

Features/Benefits

• Determines which components are over-stressed using Smoke analysis or observes component yields using Monte Carlo analysis to prevent board failures
• Advanced simulation performance technology saves time,improves reliability, and speeds convergence on larger designs
• MATLAB Simulink interface allows system-level interfaces to be tested with actual electrical designs emulating real-world applications